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Kaneda, Noriaki, Chuang, Chun-Yen, Zhu, Ziyi, Mahadevan, Amitkumar, Farah, Bob, Bergman, Keren, Veen, Doutje van, Houtsma, Vincent. ().
Fixed-Point Analysis and FPGA Implementation of Deep Neural Network Based Equalizers for High-Speed PON .
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Kaneda, Noriaki, Chuang, Chun-Yen, Zhu, Ziyi, Mahadevan, Amitkumar, Farah, Bob, Bergman, Keren, Veen, Doutje van, Houtsma, Vincent.
Fixed-Point Analysis and FPGA Implementation of Deep Neural Network Based Equalizers for High-Speed PON.
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Gaya MLA
Kaneda, Noriaki, Chuang, Chun-Yen, Zhu, Ziyi, Mahadevan, Amitkumar, Farah, Bob, Bergman, Keren, Veen, Doutje van, Houtsma, Vincent.
Fixed-Point Analysis and FPGA Implementation of Deep Neural Network Based Equalizers for High-Speed PON.
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,
.
Text.
Gaya Turabian
Kaneda, Noriaki, Chuang, Chun-Yen, Zhu, Ziyi, Mahadevan, Amitkumar, Farah, Bob, Bergman, Keren, Veen, Doutje van, Houtsma, Vincent.
Fixed-Point Analysis and FPGA Implementation of Deep Neural Network Based Equalizers for High-Speed PON.
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,
.
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