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Non-Invasive Delay State Calibration of Silicon Optical Switching Delay Line
Silicon optical switching delay line (OSDL) chip, which composed of optical switches cascaded with optical waveguides of different lengths, has the merits of broadband true time delay and high delay accuracy, and is one of the key components in microwave photonic beamforming system. Due to the inevitable manufacturing errors of silicon photonic chips, the driving voltages of the “through” and “cross” states of each optical switch in OSDL need to be calibrated separately to ensure properly switching among different delay states. In general, additional optical power monitor taps or variable optical attenuators (VOAs) can be added into OSDL to achieve the switching voltage calibration processes of all the optical switches. However, adding additional optical power monitor taps after each optical switch will increase the extra loss of the delay line, also the I/O ports will be greatly increased. Introducing silicon VOAs based on carrier injection in each delay stage of the silicon OSDL will increase the manufacturing cost and control complexity. Therefore, a simple and non-invasive calibration technique for all the optical switches in OSDL chip is greatly needed. Here, based on the interferograms induced by the cascade unbalanced Mach-Zehnder interferences formed in OSDL, we propose a simple and effective calibration method for silicon OSDL chip without introducing additional components. As a proof of concept, we calibrated and measured all the delay states of a 5-Bit silicon OSDL chip, and the measured results agree well with those obtained with optical power monitor taps.
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