Gaya APA
Wang, Weiming, Chen, Yong, Feng, Zhenhua, Xia, Yan, Zhang, Shihua, Tao, Kai, Qian, Weifeng, Long, Zhijun, Wei, Zitao. ().
Real-Time FPGA Investigation of Potential FEC Schemes for 800G-ZR/ZR+ Forward Error Correction .
:
.
Gaya Chicago
Wang, Weiming, Chen, Yong, Feng, Zhenhua, Xia, Yan, Zhang, Shihua, Tao, Kai, Qian, Weifeng, Long, Zhijun, Wei, Zitao.
Real-Time FPGA Investigation of Potential FEC Schemes for 800G-ZR/ZR+ Forward Error Correction.
:
,
.
Text.
Gaya MLA
Wang, Weiming, Chen, Yong, Feng, Zhenhua, Xia, Yan, Zhang, Shihua, Tao, Kai, Qian, Weifeng, Long, Zhijun, Wei, Zitao.
Real-Time FPGA Investigation of Potential FEC Schemes for 800G-ZR/ZR+ Forward Error Correction.
:
,
.
Text.
Gaya Turabian
Wang, Weiming, Chen, Yong, Feng, Zhenhua, Xia, Yan, Zhang, Shihua, Tao, Kai, Qian, Weifeng, Long, Zhijun, Wei, Zitao.
Real-Time FPGA Investigation of Potential FEC Schemes for 800G-ZR/ZR+ Forward Error Correction.
:
,
.
Print.