Gaya APA
Aristyo, B., Pradityo, K., Tamba, Tua Agustinus, Nazaruddin, Yul Yunazwin, Widyotriatmo, A.. (2018).
Model Checking-based Safety Verification of a Petri Net Representation of Train Interlocking Systems .
:
The Institute of Electrical and Electronics Engineers (IEEE) Inc..
Gaya Chicago
Aristyo, B., Pradityo, K., Tamba, Tua Agustinus, Nazaruddin, Yul Yunazwin, Widyotriatmo, A..
Model Checking-based Safety Verification of a Petri Net Representation of Train Interlocking Systems.
:
The Institute of Electrical and Electronics Engineers (IEEE) Inc.,
2018.
Computer File.
Gaya MLA
Aristyo, B., Pradityo, K., Tamba, Tua Agustinus, Nazaruddin, Yul Yunazwin, Widyotriatmo, A..
Model Checking-based Safety Verification of a Petri Net Representation of Train Interlocking Systems.
:
The Institute of Electrical and Electronics Engineers (IEEE) Inc.,
2018.
Computer File.
Gaya Turabian
Aristyo, B., Pradityo, K., Tamba, Tua Agustinus, Nazaruddin, Yul Yunazwin, Widyotriatmo, A..
Model Checking-based Safety Verification of a Petri Net Representation of Train Interlocking Systems.
:
The Institute of Electrical and Electronics Engineers (IEEE) Inc.,
2018.
Computer File.