DeePattern : Layout Pattern Generation With Transforming Convolutional Auto-E…
VLSI layout patterns provide critical resources in various design for manufacturability research, from early technology node development to back-end design and sign-off flows. However, a diverse la…
A Novel Automatic Probe-to-Pad Alignment Error Correction Approach
In wafer test, the probe mark center shall be close to the pad center as much as possible. But the traditional probe-to-pad alignment (PTPA) process cannot always meet the requirements. So a novel …
l₁ Trend Filtering-Based Change Point Detection for Pumping Line Balance of…
One of the most significant manufacturing issues is how to monitor and diagnose the state of machines from various sensor data. Detecting machine state changes is very important because it can prev…
Virtual Metrology for Etch Profile in Silicon Trench Etching With SF₆/O₂/…
This study practiced virtual metrology (VM) for the etch profile and depth in the deep silicon trench etching with SF 6 /O 2 /Ar plasma. Machine learning-based VM models constitute the classificati…
Parametric Optimization for Moisture Infiltration Prevention Into a FOUP (Fro…
Contamination control and mitigation is a vital function in the semiconductor manufacturing process, especially with the ever-decreasing feature size of wafers making them more prone and sensitive …
A Comparative Study on Velocity Fields, Humidity and Oxygen Concentration in …
Microchip features continue to reduce in size year after year. Oxygen (O 2 ) and moisture present in ambient air can cause product defects and therefore lower production yield. Smaller feature size…
Fuzzy Selection Model for Quality-Based IC Packaging Process Outsourcers
The annual output value of Taiwan’s wafer foundry and IC packaging test ranks first worldwide. The electronics industry has a complete industrial ecological chain in the supply chain system of gl…
Change Qualification Framework in Semiconductor Manufacturing
Wafer fabrication (Wafer Fab) involves state-of-the-art, expensive, and highly complex processes, and only little is known about its change qualification, a process that follows a strict guideline …
A Hierarchical Spatial-Test Attention Network for Explainable Multiple Wafer …
In the semiconductor manufacturing processes, a wafer bin map (WBM) represents electrical test results. In WBMs, defective dies often form specific local patterns; such patterns are usually caused …
An Investigation of Edge Bead Removal Width Variability, Effects and Process …
We present a low-cost, vision-based method to study the effects of photo resist edge bead removal (EBR) width variability in a manufacturing environment. In micro- and nanofabrication manufacturing…
Karya Umum 
Filsafat 
Agama 
Ilmu-ilmu Sosial 
Bahasa 
Ilmu-ilmu Murni 
Ilmu-ilmu Terapan 
Kesenian, Hiburan, dan Olahraga 
Kesusastraan 
Geografi dan Sejarah